Performance of MMX(TM) Technology Intrinsics

Key to the table entries

Intrinsic Name

MMX™ Technology, Intel® SSE, Intel® SSE2

IA-64 Architecture

_mm_empty

A

B

_mm_cvtsi32_si64

A

A

_mm_cvtsi64_si32

A

A

_mm_packs_pi16

A

A

_mm_packs_pi32

A

A

_mm_packs_pu16

A

A

_mm_unpackhi_pi8

A

A

_mm_unpackhi_pi16

A

A

_mm_unpackhi_pi32

A

A

_mm_unpacklo_pi8

A

A

_mm_unpacklo_pi16

A

A

_mm_unpacklo_pi32

A

A

_mm_add_pi8

A

A

_mm_add_pi16

A

A

_mm_add_pi32

A

A

_mm_adds_pi8

A

A

_mm_adds_pi16

A

A

_mm_adds_pu8

A

A

_mm_adds_pu16

A

A

_mm_sub_pi8

A

A

_mm_sub_pi16

A

A

_mm_sub_pi32

A

A

_mm_subs_pi8

A

A

_mm_subs_pi16

A

A

_mm_subs_pu8

A

A

_mm_subs_pu16

A

A

_mm_madd_pi16

A

C

_mm_mulhi_pi16

A

A

_mm_mullo_pi16

A

A

_mm_sll_pi16

A

A

_mm_slli_pi16

A

A

_mm_sll_pi32

A

A

_mm_slli_pi32

A

A

_mm_sll_pi64

A

A

_mm_slli_pi64

A

A

_mm_sra_pi16

A

A

_mm_srai_pi16

A

A

_mm_sra_pi32

A

A

_mm_srai_pi32

A

A

_mm_srl_pi16

A

A

_mm_srli_pi16

A

A

_mm_srl_pi32

A

A

_mm_srli_pi32

A

A

_mm_srl_si64

A

A

_mm_srli_si64

A

A

_mm_and_si64

A

A

_mm_andnot_si64

A

A

_mm_or_si64

A

A

_mm_xor_si64

A

A

_mm_cmpeq_pi8

A

A

_mm_cmpeq_pi16

A

A

_mm_cmpeq_pi32

A

A

_mm_cmpgt_pi8

A

A

_mm_cmpgt_pi16

A

A

_mm_cmpgt_pi32

A

A

_mm_setzero_si64

A

A

_mm_set_pi32

A

A

_mm_set_pi16

A

C

_mm_set_pi8

A

C

_mm_set1_pi32

A

A

_mm_set1_pi16

A

A

_mm_set1_pi8

A

A

_mm_setr_pi32

A

A

_mm_setr_pi16

A

C

_mm_setr_pi8

A

C

_mm_empty is implemented in IA-64 instructions as a NOP for source compatibility only.