The single-precision floating-point vector intrinsics listed here are designed for the IntelĀ® PentiumĀ® 4 processor with Streaming SIMD Extensions 3 (SSE3).
The results of each intrinsic operation are placed in the registers R0, R1, R2, and R3.
The prototypes for these intrinsics are in the pmmintrin.h header file.
Intrinsic Name |
Operation |
Corresponding |
---|---|---|
_mm_addsub_ps |
Subtract and add |
ADDSUBPS |
_mm_hadd_ps |
Add |
HADDPS |
_mm_hsub_ps |
Subtracts |
HSUBPS |
_mm_movehdup_ps |
Duplicates |
MOVSHDUP |
_mm_moveldup_ps |
Duplicates |
MOVSLDUP |