Intrinsic |
Description |
---|---|
unsigned __int64 __getReg(const int whichReg) |
Gets the value from a hardware register based on the index passed in. Produces a corresponding mov = r instruction. Provides access to the following registers: See Register Names for getReg() and setReg(). |
void __setReg(const int whichReg, unsigned __int64 value) |
Sets the value for a hardware register based on the index passed in. Produces a corresponding mov = r instruction. See Register Names for getReg() and setReg(). |
unsigned __int64 __getIndReg(const int whichIndReg, __int64 index) |
Return the value of an indexed register. The index is the 2nd argument; the register file is the first argument. |
void __setIndReg(const int whichIndReg, __int64 index, unsigned __int64 value) |
Copy a value in an indexed register. The index is the 2nd argument; the register file is the first argument. |
void *__ptr64 _rdteb(void) |
Gets TEB address. The TEB address is kept in r13 and maps to the move r=tp instruction |
void __isrlz(void) |
Executes the serialize instruction. Maps to the srlz.i instruction. |
void __dsrlz(void) |
Serializes the data. Maps to the srlz.d instruction. |
unsigned __int64 __fetchadd4_acq(unsigned int *addend, const int increment) |
Map the fetchadd4.acq instruction. |
unsigned __int64 __fetchadd4_rel(unsigned int *addend, const int increment) |
Map the fetchadd4.rel instruction. |
unsigned __int64 __fetchadd8_acq(unsigned __int64 *addend, const int increment) |
Map the fetchadd8.acq instruction. |
unsigned __int64 __fetchadd8_rel(unsigned __int64 *addend, const int increment) |
Map the fetchadd8.rel instruction. |
void __fwb(void) |
Flushes the write buffers. Maps to the fwb instruction. |
void __ldfs(const int whichFloatReg, void *src) |
Map the ldfs instruction. Load a single precision value to the specified register. |
void __ldfd(const int whichFloatReg, void *src) |
Map the ldfd instruction. Load a double precision value to the specified register. |
void __ldfe(const int whichFloatReg, void *src) |
Map the ldfe instruction. Load an extended precision value to the specified register. |
void __ldf8(const int whichFloatReg, void *src) |
Map the ldf8 instruction. |
void __ldf_fill(const int whichFloatReg, void *src) |
Map the ldf.fill instruction. |
void __stfs(void *dst, const int whichFloatReg) |
Map the sfts instruction. |
void __stfd(void *dst, const int whichFloatReg) |
Map the stfd instruction. |
void __stfe(void *dst, const int whichFloatReg) |
Map the stfe instruction. |
void __stf8(void *dst, const int whichFloatReg) |
Map the stf8 instruction. |
void __stf_spill(void *dst, const int whichFloatReg) |
Map the stf.spill instruction. |
void __mf(void) |
Executes a memory fence instruction. Maps to the mf instruction. |
void __mfa(void) |
Executes a memory fence, acceptance form instruction. Maps to the mf.a instruction. |
void __synci(void) |
Enables memory synchronization. Maps to the sync.i instruction. |
unsigned __int64 __thash(__int64) |
Generates a translation hash entry address. Maps to the thash r = r instruction. |
unsigned __int64 __ttag(__int64) |
Generates a translation hash entry tag. Maps to the ttag r=r instruction. |
void __itcd(__int64 pa) |
Insert an entry into the data translation cache (Map itc.d instruction). |
void __itci(__int64 pa) |
Insert an entry into the instruction translation cache (Map itc.i). |
void __itrd(__int64 whichTransReg, __int64 pa) |
Map the itr.d instruction. |
void __itri(__int64 whichTransReg, __int64 pa) |
Map the itr.i instruction. |
void __ptce(__int64 va) |
Map the ptc.e instruction. |
void __ptcl(__int64 va, __int64 pagesz) |
Purges the local translation cache. Maps to the ptc.l r, r instruction. |
void __ptcg(__int64 va, __int64 pagesz) |
Purges the global translation cache. Maps to the ptc.g r, r instruction. |
void __ptcga(__int64 va, __int64 pagesz) |
Purges the global translation cache and ALAT. Maps to the ptc.ga r, r instruction. |
void __ptri(__int64 va, __int64 pagesz) |
Purges the translation register. Maps to the ptr.i r, r instruction. |
void __ptrd(__int64 va, __int64 pagesz) |
Purges the translation register. Maps to the ptr.d r, r instruction. |
__int64 __tpa(__int64 va) |
Map the tpa instruction. |
void __invalat(void) |
Invalidates ALAT. Maps to the invala instruction. |
void __invala (void) |
Same as void __invalat(void) |
void __invala_gr(const int whichGeneralReg) |
whichGeneralReg = 0-127 |
void __invala_fr(const int whichFloatReg) |
whichFloatReg = 0-127 |
void __break(const int) |
Generates a break instruction with an immediate. |
void __nop(const int) |
Generate a nop instruction. |
void __debugbreak(void) |
Generates a Debug Break Instruction fault. |
void __fc(void*) |
Flushes a cache line associated with the address given by the argument. Maps to the fc instruction. |
void __sum(int mask) |
Sets the user mask bits of PSR. Maps to the sum imm24 instruction. |
void __rum(int mask) |
Resets the user mask. |
__int64 _ReturnAddress(void) |
Get the caller's address. |
void __lfetch(int lfhint, void const *y) |
Generate the lfetch.lfhint instruction. The value of the first argument specifies the hint type. |
void __lfetch_fault(int lfhint, void const *y) |
Generate the lfetch.fault.lfhint instruction. The value of the first argument specifies the hint type. |
void __lfetch_excl(int lfhint, void const *y) |
Generate the lfetch.excl.lfhint instruction. The value {0|1|2|3} of the first argument specifies the hint type. |
void __lfetch_fault_excl(int lfhint, void const *y) |
Generate the lfetch.fault.excl.lfhint instruction. The value of the first argument specifies the hint type. |
unsigned int __cacheSize(unsigned int cacheLevel) |
See __cacheSize() intrinsic under Intrinsics for Use Across All IA>Miscellaneous Intrinsics. |
void __memory_barrier(void) |
Creates a barrier across which the compiler will not schedule any data access instruction. The compiler may allocate local data in registers across a memory barrier, but not global data. |
void __ssm(int mask) |
Sets the system mask. Maps to the ssm imm24 instruction. |
void __rsm(int mask) |
Resets the system mask bits of PSR. Maps to the rsm imm24 instruction. |