DWORD Multiply Intrinsics for Streaming SIMD Extensions 4

These DWORD multiply intrinsics are designed to aid vectorization. They enable four simultaneous 32 bit by 32 bit multiplies.

Intrinsic Name

Operation

Corresponding
SSE4 Instruction

__m128i _mm_mul_epi32( __m128i a, __m128i b)

Packed integer 32-bit multiplication of 2 low pairs of operands producing two 64-bit results

PMULDQ

__m128i _mm_mullo_epi32( __m128i a, __m128i b)

Packed integer 32-bit multiplication with truncation of upper halves of results

PMULLD