The double-precision floating-point intrinsics listed here are designed for the IntelĀ® PentiumĀ® 4 processor with Streaming SIMD Extensions 3 (SSE3).
The results of each intrinsic operation are placed in the registers R0 and R1.
The prototypes for these intrinsics are in the pmmintrin.h header file.
Intrinsic Name |
Operation |
Corresponding |
---|---|---|
_mm_addsub_pd |
Subtract and add |
ADDSUBPD |
_mm_hadd_pd |
Add |
HADDPD |
_mm_hsub_pd |
Subtract |
HSUBPD |
_mm_loaddup_pd |
Duplicate |
MOVDDUP |
_mm_movedup_pd |
Duplicate |
MOVDDUP |
extern __m128d _mm_addsub_pd(__m128d a, __m128d b);
Adds upper vector element while subtracting lower vector element.
extern __m128d _mm_loaddup_pd(double const * dp);
Duplicates a double value into upper and lower vector elements.